en/latest/clock_8h_source.html

#pragma once


#include "stm32g4xx_hal.h"

#include <stdbool.h>

#include <stdint.h>


void core_clock_ADC12_init();


void core_clock_ADC345_init();


void core_clock_FDCAN_init(FDCAN_GlobalTypeDef *can);


bool core_clock_USART_init(USART_TypeDef *usart);


bool core_clock_timer_init(TIM_TypeDef *timer);


bool core_clock_I2C_init(I2C_TypeDef *i2c);


bool core_clock_RTC_init();


void core_clock_port_init(GPIO_TypeDef *port);


uint8_t core_clock_generate_params(uint32_t src_freq, uint32_t target_freq, uint8_t *n, uint8_t *m, uint8_t *r);


bool core_clock_init();

core_clock_FDCAN_init
void core_clock_FDCAN_init(FDCAN_GlobalTypeDef *can)
Set FDCAN clock to PCLK1 and enable it.
Definition clock.c:19

core_clock_USART_init
bool core_clock_USART_init(USART_TypeDef *usart)
Set a USART clock to PCLK1 and enable it.
Definition clock.c:37

core_clock_ADC345_init
void core_clock_ADC345_init()
Set the clocks for ADC3, ADC4, and ADC5 to SYSCLK and enable them.
Definition clock.c:14

core_clock_generate_params
uint8_t core_clock_generate_params(uint32_t src_freq, uint32_t target_freq, uint8_t *n, uint8_t *m, uint8_t *r)
Generate the settings for the N, M, and R dividers from the clock source frequency and the desired ou...
Definition clock.c:114

core_clock_timer_init
bool core_clock_timer_init(TIM_TypeDef *timer)
Enable a timer clock.
Definition clock.c:62

core_clock_port_init
void core_clock_port_init(GPIO_TypeDef *port)
Initializes port clock for selected port.
Definition clock.c:104

core_clock_I2C_init
bool core_clock_I2C_init(I2C_TypeDef *i2c)
Set an I2C clock to PCLK1 and enable it.
Definition clock.c:73

core_clock_RTC_init
bool core_clock_RTC_init()
Enable the external 32.768kHz oscillator and set the RTC clock to it.
Definition clock.c:94

core_clock_ADC12_init
void core_clock_ADC12_init()
Set the clocks for ADC1 and ADC2 to SYSCLK and enable them.
Definition clock.c:9

core_clock_init
bool core_clock_init()
Initialize the STM32G4's core clocks.
Definition clock.c:177